1. Technical Field
The disclosure relates to a shift register circuit, and more particularly, to a shift register circuit using a switch device for achieving low power consumption and high driving ability.
2. Related Art
Liquid crystal displays (LCDs) have advantages of a thin profile, low power consumption, and low radiation, and are broadly adopted for application in media players, mobile phones, personal digital assistants (PDAs), computer displays, and flat screen televisions. The operation of a liquid crystal display is featured by modulating the voltage drop across opposite sides of a liquid crystal layer for twisting the angles of liquid crystal molecules in the liquid crystal layer so that the transmittance of the liquid crystal layer can be controlled for illustrating images with the aid of light source provided by a backlight module. In general, the liquid crystal display comprises plural pixel units, a source driver, and a shift register circuit. The source driver is utilized for providing plural data signals to be written into the pixel units. The shift register circuit comprises a plurality of shift register stages and functions to generate plural gate signals for controlling the operations of writing the data signals into the pixel units. That is, the shift register circuit is a crucial device for providing a control of writing the data signals into the pixel units.
It is well known that traditional liquid crystal display includes lots of switch devices, and each switch device has at least one thin film transistor (TFT) disposed therein. Consequently, the reverse leakage currents of thin film transistors disposed in the traditional liquid crystal display have a significant effect to cause high power consumption and high panel working temperature, which degrades panel display quality and reduces panel lifetime. Besides, if the shift register circuit is integrated in a display panel comprising pixel array to bring the cost down, i.e. based on a gate-driver on array (GOA) architecture, the aforementioned shift register stages are sequentially arranged in a lengthy border area of the display panel so that each shift register stage can be directly connected to one corresponding gate line, and low signal transmitting ability caused by the turn-on resistance of each switch device may further degrade panel display quality.